lo-amos-proto.h File Reference

#include "octave-config.h"
#include "f77-fcn.h"

Go to the source code of this file.

Functions
F77_RET_T	F77_FUNC (cairy, CAIRY)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T	F77_FUNC (cbesh, CBESH)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T	F77_FUNC (cbesi, CBESI)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T	F77_FUNC (cbesj, CBESJ)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T	F77_FUNC (cbesk, CBESK)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T	F77_FUNC (cbesy, CBESY)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_INT &F77_RET_T	F77_FUNC (cbiry, CBIRY)(const F77_CMPLX *
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T	F77_FUNC (zairy, ZAIRY)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T	F77_FUNC (zbesh, ZBESH)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T	F77_FUNC (zbesi, ZBESI)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T	F77_FUNC (zbesj, ZBESJ)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T	F77_FUNC (zbesk, ZBESK)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT &F77_RET_T	F77_FUNC (zbesy, ZBESY)(const F77_DBLE &
F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT &F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_INT &F77_RET_T const F77_INT const F77_INT const F77_CMPLX F77_INT &F77_RET_T	F77_FUNC (zbiry, ZBIRY)(const F77_DBLE &

Function Documentation

F77_FUNC() [1/14]

F77_RET_T F77_FUNC	(	cairy	,
		CAIRY
	)		const

F77_FUNC() [2/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T F77_FUNC	(	cbesh	,
		CBESH
	)		const

F77_FUNC() [3/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T F77_FUNC	(	cbesi	,
		CBESI
	)		const

F77_FUNC() [4/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T F77_FUNC	(	cbesj	,
		CBESJ
	)		const

F77_FUNC() [5/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T F77_FUNC	(	cbesk	,
		CBESK
	)		const

F77_FUNC() [6/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T F77_FUNC	(	cbesy	,
		CBESY
	)		const

F77_FUNC() [7/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_INT& F77_RET_T F77_FUNC	(	cbiry	,
		CBIRY
	)		const

F77_FUNC() [8/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T F77_FUNC	(	zairy	,
		ZAIRY
	)		const &

F77_FUNC() [9/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T F77_FUNC	(	zbesh	,
		ZBESH
	)		const &

F77_FUNC() [10/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T F77_FUNC	(	zbesi	,
		ZBESI
	)		const &

F77_FUNC() [11/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T F77_FUNC	(	zbesj	,
		ZBESJ
	)		const &

F77_FUNC() [12/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T F77_FUNC	(	zbesk	,
		ZBESK
	)		const &

F77_FUNC() [13/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT& F77_RET_T F77_FUNC	(	zbesy	,
		ZBESY
	)		const &

F77_FUNC() [14/14]

F77_RET_T const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_INT& F77_RET_T const F77_REAL const F77_INT const F77_INT F77_CMPLX F77_INT F77_CMPLX F77_INT& F77_RET_T const F77_DBLE const F77_DBLE const F77_INT const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_INT& F77_RET_T const F77_INT const F77_INT const F77_CMPLX F77_INT& F77_RET_T F77_FUNC	(	zbiry	,
		ZBIRY
	)		const &