GNU Octave  8.1.0
A high-level interpreted language, primarily intended for numerical computations, mostly compatible with Matlab
lo-lapack-proto.h File Reference
#include "octave-config.h"
#include "f77-fcn.h"
#include "oct-cmplx.h"
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Typedefs

typedef F77_INT(* complex_selector) (const F77_DBLE_CMPLX &)
 
typedef F77_INT(* double_selector) (const F77_DBLE &, const F77_DBLE &)
 
typedef F77_INT(* float_complex_selector) (const F77_CMPLX &)
 
typedef F77_INT(* float_selector) (const F77_REAL &, const F77_REAL &)
 

Functions

F77_RET_T F77_FUNC (cgebak, CGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgebal, CGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgecon, CGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgeesx, CGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgeevx, CGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgehrd, CGEHRD)(const F77_INT &
 
F77_RET_T F77_FUNC (cgejsv, CGEJSV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgelqf, CGELQF)(const F77_INT &
 
F77_RET_T F77_FUNC (cgelsd, CGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T F77_FUNC (cgelsy, CGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgeqp3, CGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T F77_FUNC (cgeqrf, CGEQRF)(const F77_INT &
 
F77_RET_T F77_FUNC (cgesdd, CGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgesvd, CGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T F77_FUNC (cgetrf, CGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (cgetri, CGETRI)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgetrs, CGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cggbal, CGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cggev, CGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cheev, CHEEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (chegv, CHEGV)(const F77_INT &
 
F77_RET_T F77_FUNC (cherk, CHERK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (clartg, CLARTG)(const F77_CMPLX *
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cormlq, CORMLQ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cormqr, CORMQR)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpocon, CPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotrf, CPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotri, CPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotrs, CPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE F77_DBLE *F77_RET_T F77_FUNC (crsf2csf, CRSF2CSF)(const F77_INT &
 
F77_RET_T F77_FUNC (csyrk, CSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrcon, CTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrsen, CTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL F77_REAL F77_REAL const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_INT F77_DBLE F77_DBLE F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (ctrsyl, CTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrtri, CTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrtrs, CTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cunghr, CUNGHR)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cungqr, CUNGQR)(const F77_INT &
 
F77_RET_T F77_FUNC (dgbcon, DGBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgbtrf, DGBTRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (dgbtrs, DGBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgebak, DGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgebal, DGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgecon, DGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgeesx, DGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgeevx, DGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgehrd, DGEHRD)(const F77_INT &
 
F77_RET_T F77_FUNC (dgejsv, DGEJSV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgelqf, DGELQF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T F77_FUNC (dgelsd, DGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T F77_FUNC (dgelsy, DGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T F77_FUNC (dgeqp3, DGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgeqrf, DGEQRF)(const F77_INT &
 
F77_RET_T F77_FUNC (dgesdd, DGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgesvd, DGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (dgetrf, DGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgetri, DGETRI)(const F77_INT &
 
F77_RET_T F77_FUNC (dgetrs, DGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggbak, DGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggbal, DGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggev, DGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgghrd, DGGHRD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgtsv, DGTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgttrf, DGTTRF)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_INT F77_INT &F77_RET_T F77_FUNC (dgttrs, DGTTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dhgeqz, DHGEQZ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dlag2, DLAG2)(const F77_DBLE *A
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T F77_FUNC (dlartg, DLARTG)(const F77_DBLE &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T F77_FUNC (dorghr, DORGHR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (dorgqr, DORGQR)(const F77_INT &
 
F77_RET_T F77_FUNC (dormlq, DORMLQ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dormqr, DORMQR)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (dpbcon, DPBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpbtrf, DPBTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpbtrs, DPBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpocon, DPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotrf, DPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotri, DPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotrs, DPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dptsv, DPTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE F77_DBLE *F77_RET_T F77_CMPLX F77_CMPLX F77_REAL F77_REAL *F77_RET_T F77_FUNC (dsyev, DSYEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dsygv, DSYGV)(const F77_INT &
 
F77_RET_T F77_FUNC (dsyrk, DSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtgevc, DTGEVC)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtgsen, DTGSEN)(const F77_INT &IJOB
 
F77_RET_T F77_FUNC (dtrcon, DTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dtrsen, DTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrsyl, DTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrtri, DTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrtrs, DTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgebak, SGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgebal, SGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgecon, SGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgeesx, SGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgeevx, SGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgehrd, SGEHRD)(const F77_INT &
 
F77_RET_T F77_FUNC (sgejsv, SGEJSV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgelqf, SGELQF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (sgelsd, SGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgelsy, SGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgeqp3, SGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgeqrf, SGEQRF)(const F77_INT &
 
F77_RET_T F77_FUNC (sgesdd, SGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgesvd, SGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (sgetrf, SGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgetri, SGETRI)(const F77_INT &
 
F77_RET_T F77_FUNC (sgetrs, SGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggbak, SGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggbal, SGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggev, SGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T F77_FUNC (slartg, SLARTG)(const F77_REAL &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sorghr, SORGHR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sorgqr, SORGQR)(const F77_INT &
 
F77_RET_T F77_FUNC (sormlq, SORMLQ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sormqr, SORMQR)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spocon, SPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotrf, SPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotri, SPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotrs, SPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ssyev, SSYEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ssygv, SSYGV)(const F77_INT &
 
F77_RET_T F77_FUNC (ssyrk, SSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strcon, STRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T F77_FUNC (strsen, STRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strsyl, STRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strtri, STRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strtrs, STRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xclange, XCLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xdlamch, XDLAMCH)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xdlange, XDLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xilaenv, XILAENV)(const F77_INT &
 
F77_RET_T F77_FUNC (xslange, XSLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xzlange, XZLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgbcon, ZGBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgbtrf, ZGBTRF)(const F77_INT &
 
F77_RET_T F77_FUNC (zgbtrs, ZGBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgebak, ZGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgebal, ZGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgecon, ZGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgeesx, ZGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgeevx, ZGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgehrd, ZGEHRD)(const F77_INT &
 
F77_RET_T F77_FUNC (zgejsv, ZGEJSV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgelqf, ZGELQF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgelsd, ZGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgelsy, ZGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgeqp3, ZGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgeqrf, ZGEQRF)(const F77_INT &
 
F77_RET_T F77_FUNC (zgesdd, ZGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgesvd, ZGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgetrf, ZGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgetri, ZGETRI)(const F77_INT &
 
F77_RET_T F77_FUNC (zgetrs, ZGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggbak, ZGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggbal, ZGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggev, ZGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgghrd, ZGGHRD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (zgtsv, ZGTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T F77_FUNC (zgttrf, ZGTTRF)(const F77_INT &
 
F77_RET_T F77_FUNC (zgttrs, ZGTTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zheev, ZHEEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zhegv, ZHEGV)(const F77_INT &
 
F77_RET_T F77_FUNC (zherk, ZHERK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zhgeqz, ZHGEQZ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T F77_FUNC (zlartg, ZLARTG)(const F77_DBLE_CMPLX *
 
F77_RET_T F77_FUNC (zormlq, ZORMLQ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zormqr, ZORMQR)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbcon, ZPBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbtrf, ZPBTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbtrs, ZPBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpocon, ZPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotrf, ZPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotri, ZPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotrs, ZPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (zptsv, ZPTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zrsf2csf, ZRSF2CSF)(const F77_INT &
 
F77_RET_T F77_FUNC (zsyrk, ZSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztgevc, ZTGEVC)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztgsen, ZTGSEN)(const F77_INT &IJOB
 
F77_RET_T F77_FUNC (ztrcon, ZTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL F77_REAL F77_REAL const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T F77_FUNC (ztrsen, ZTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrsyl, ZTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrtri, ZTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrtrs, ZTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zunghr, ZUNGHR)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zungqr, ZUNGQR)(const F77_INT &
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_REAL *, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_REAL *, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_REAL *, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_REAL *, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 

Variables

F77_RET_T const F77_INT F77_CMPLXA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXALPHA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLEALPHAI
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEALPHAR
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLXB
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLEBETA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLXCQ
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT const F77_INT F77_INT F77_DBLE_CMPLXCWORK
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXCZ
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLEDIF
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INTF77_CHAR_ARG_LEN_DECL
 
F77_RET_T F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INTIHI
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INTILO
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INTINFO
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INTIWORK
 
F77_RET_T const F77_INT F77_CMPLX const F77_INTLDA
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INTLDB
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDQ
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INT F77_DBLE const F77_INTLDV
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDVL
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDVR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDZ
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INTLIWORK
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REALLSCALE
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLWORK
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INTM
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT const F77_INTMM
 
F77_RET_T const F77_INTN
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLEPL
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLEPR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEQ
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REAL F77_REALRSCALE
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLERWORK
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLESAFMIN
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLESCALE1
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLESCALE2
 
F77_RET_T F77_INTSELECT
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INT F77_DBLEV
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEVL
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEVR
 
F77_RET_T const F77_LOGICALWANTQ
 
F77_RET_T const F77_LOGICAL const F77_LOGICALWANTZ
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLEWI
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REAL F77_REAL F77_REALWORK
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLEWR1
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLEWR2
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXxVL
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXxVR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEZ
 

Typedef Documentation

◆ complex_selector

F77_RET_T complex_selector

Definition at line 563 of file lo-lapack-proto.h.

◆ double_selector

F77_RET_T double_selector

Definition at line 561 of file lo-lapack-proto.h.

◆ float_complex_selector

F77_RET_T float_complex_selector

Definition at line 564 of file lo-lapack-proto.h.

◆ float_selector

F77_RET_T float_selector

Definition at line 562 of file lo-lapack-proto.h.

Function Documentation

◆ F77_FUNC() [1/186]

F77_RET_T F77_FUNC ( cgebak  ,
CGEBAK   
)

◆ F77_FUNC() [2/186]

F77_RET_T F77_FUNC ( cgebal  ,
CGEBAL   
)

◆ F77_FUNC() [3/186]

F77_RET_T F77_FUNC ( cgecon  ,
CGECON   
)

◆ F77_FUNC() [4/186]

F77_RET_T F77_FUNC ( cgeesx  ,
CGEESX   
)

◆ F77_FUNC() [5/186]

F77_RET_T F77_FUNC ( cgeevx  ,
CGEEVX   
)

◆ F77_FUNC() [6/186]

F77_RET_T F77_FUNC ( cgehrd  ,
CGEHRD   
) const &

◆ F77_FUNC() [7/186]

F77_RET_T F77_FUNC ( cgejsv  ,
CGEJSV   
)

◆ F77_FUNC() [8/186]

◆ F77_FUNC() [9/186]

F77_RET_T F77_FUNC ( cgelsd  ,
CGELSD   
) const &

◆ F77_FUNC() [10/186]

◆ F77_FUNC() [11/186]

◆ F77_FUNC() [12/186]

◆ F77_FUNC() [13/186]

F77_RET_T F77_FUNC ( cgesdd  ,
CGESDD   
)

◆ F77_FUNC() [14/186]

F77_RET_T F77_FUNC ( cgesvd  ,
CGESVD   
)

◆ F77_FUNC() [15/186]

◆ F77_FUNC() [16/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( cgetri  ,
CGETRI   
) const &

◆ F77_FUNC() [17/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T F77_DBLE_CMPLX const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( cgetrs  ,
CGETRS   
)

◆ F77_FUNC() [18/186]

F77_RET_T F77_FUNC ( cggbal  ,
CGGBAL   
)

◆ F77_FUNC() [19/186]

F77_RET_T F77_FUNC ( cggev  ,
CGGEV   
)

◆ F77_FUNC() [20/186]

F77_RET_T F77_FUNC ( cheev  ,
CHEEV   
)

◆ F77_FUNC() [21/186]

F77_RET_T F77_FUNC ( chegv  ,
CHEGV   
) const &

◆ F77_FUNC() [22/186]

F77_RET_T F77_FUNC ( cherk  ,
CHERK   
)

◆ F77_FUNC() [23/186]

F77_RET_T F77_FUNC ( clartg  ,
CLARTG   
) const

◆ F77_FUNC() [24/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( cormlq  ,
CORMLQ   
)

◆ F77_FUNC() [25/186]

F77_RET_T F77_FUNC ( cormqr  ,
CORMQR   
)

◆ F77_FUNC() [26/186]

F77_RET_T F77_FUNC ( cpocon  ,
CPOCON   
)

◆ F77_FUNC() [27/186]

F77_RET_T F77_FUNC ( cpotrf  ,
CPOTRF   
)

◆ F77_FUNC() [28/186]

F77_RET_T F77_FUNC ( cpotri  ,
CPOTRI   
)

◆ F77_FUNC() [29/186]

F77_RET_T F77_FUNC ( cpotrs  ,
CPOTRS   
)

◆ F77_FUNC() [30/186]

◆ F77_FUNC() [31/186]

F77_RET_T F77_FUNC ( csyrk  ,
CSYRK   
)

◆ F77_FUNC() [32/186]

F77_RET_T F77_FUNC ( ctrcon  ,
CTRCON   
)

◆ F77_FUNC() [33/186]

F77_RET_T F77_FUNC ( ctrsen  ,
CTRSEN   
)

◆ F77_FUNC() [34/186]

◆ F77_FUNC() [35/186]

F77_RET_T F77_FUNC ( ctrtri  ,
CTRTRI   
)

◆ F77_FUNC() [36/186]

F77_RET_T F77_FUNC ( ctrtrs  ,
CTRTRS   
)

◆ F77_FUNC() [37/186]

F77_RET_T F77_FUNC ( cunghr  ,
CUNGHR   
) const &

◆ F77_FUNC() [38/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( cungqr  ,
CUNGQR   
) const &

◆ F77_FUNC() [39/186]

F77_RET_T F77_FUNC ( dgbcon  ,
DGBCON   
)

◆ F77_FUNC() [40/186]

F77_RET_T F77_FUNC ( dgbtrf  ,
DGBTRF   
) const &

◆ F77_FUNC() [41/186]

F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( dgbtrs  ,
DGBTRS   
)

◆ F77_FUNC() [42/186]

F77_RET_T F77_FUNC ( dgebak  ,
DGEBAK   
)

◆ F77_FUNC() [43/186]

F77_RET_T F77_FUNC ( dgebal  ,
DGEBAL   
)

◆ F77_FUNC() [44/186]

F77_RET_T F77_FUNC ( dgecon  ,
DGECON   
)

◆ F77_FUNC() [45/186]

F77_RET_T F77_FUNC ( dgeesx  ,
DGEESX   
)

◆ F77_FUNC() [46/186]

F77_RET_T F77_FUNC ( dgeevx  ,
DGEEVX   
)

◆ F77_FUNC() [47/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dgehrd  ,
DGEHRD   
) const &

◆ F77_FUNC() [48/186]

F77_RET_T F77_FUNC ( dgejsv  ,
DGEJSV   
)

◆ F77_FUNC() [49/186]

◆ F77_FUNC() [50/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T F77_FUNC ( dgelsd  ,
DGELSD   
) const &

◆ F77_FUNC() [51/186]

◆ F77_FUNC() [52/186]

◆ F77_FUNC() [53/186]

◆ F77_FUNC() [54/186]

F77_RET_T F77_FUNC ( dgesdd  ,
DGESDD   
)

◆ F77_FUNC() [55/186]

F77_RET_T F77_FUNC ( dgesvd  ,
DGESVD   
)

◆ F77_FUNC() [56/186]

◆ F77_FUNC() [57/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dgetri  ,
DGETRI   
) const &

◆ F77_FUNC() [58/186]

F77_RET_T F77_FUNC ( dgetrs  ,
DGETRS   
)

◆ F77_FUNC() [59/186]

F77_RET_T F77_FUNC ( dggbak  ,
DGGBAK   
)

◆ F77_FUNC() [60/186]

F77_RET_T F77_FUNC ( dggbal  ,
DGGBAL   
)

◆ F77_FUNC() [61/186]

F77_RET_T F77_FUNC ( dggev  ,
DGGEV   
)

◆ F77_FUNC() [62/186]

F77_RET_T F77_FUNC ( dgghrd  ,
DGGHRD   
)

◆ F77_FUNC() [63/186]

F77_RET_T F77_FUNC ( dgtsv  ,
DGTSV   
) const &

◆ F77_FUNC() [64/186]

◆ F77_FUNC() [65/186]

◆ F77_FUNC() [66/186]

F77_RET_T F77_FUNC ( dhgeqz  ,
DHGEQZ   
)

◆ F77_FUNC() [67/186]

F77_RET_T F77_FUNC ( dlag2  ,
DLAG2   
) const

◆ F77_FUNC() [68/186]

F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX* F77_RET_T F77_FUNC ( dlartg  ,
DLARTG   
) const &

◆ F77_FUNC() [69/186]

◆ F77_FUNC() [70/186]

◆ F77_FUNC() [71/186]

F77_RET_T F77_FUNC ( dormlq  ,
DORMLQ   
)

◆ F77_FUNC() [72/186]

F77_RET_T F77_FUNC ( dormqr  ,
DORMQR   
)

◆ F77_FUNC() [73/186]

◆ F77_FUNC() [74/186]

F77_RET_T F77_FUNC ( dpbtrf  ,
DPBTRF   
)

◆ F77_FUNC() [75/186]

F77_RET_T F77_FUNC ( dpbtrs  ,
DPBTRS   
)

◆ F77_FUNC() [76/186]

F77_RET_T F77_FUNC ( dpocon  ,
DPOCON   
)

◆ F77_FUNC() [77/186]

F77_RET_T F77_FUNC ( dpotrf  ,
DPOTRF   
)

◆ F77_FUNC() [78/186]

F77_RET_T F77_FUNC ( dpotri  ,
DPOTRI   
)

◆ F77_FUNC() [79/186]

F77_RET_T F77_FUNC ( dpotrs  ,
DPOTRS   
)

◆ F77_FUNC() [80/186]

F77_RET_T F77_FUNC ( dptsv  ,
DPTSV   
) const &

◆ F77_FUNC() [81/186]

◆ F77_FUNC() [82/186]

F77_RET_T F77_FUNC ( dsygv  ,
DSYGV   
) const &

◆ F77_FUNC() [83/186]

F77_RET_T F77_FUNC ( dsyrk  ,
DSYRK   
)

◆ F77_FUNC() [84/186]

F77_RET_T F77_FUNC ( dtgevc  ,
DTGEVC   
)

◆ F77_FUNC() [85/186]

F77_RET_T F77_FUNC ( dtgsen  ,
DTGSEN   
) const &

◆ F77_FUNC() [86/186]

F77_RET_T F77_FUNC ( dtrcon  ,
DTRCON   
)

◆ F77_FUNC() [87/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dtrsen  ,
DTRSEN   
)

◆ F77_FUNC() [88/186]

F77_RET_T F77_FUNC ( dtrsyl  ,
DTRSYL   
)

◆ F77_FUNC() [89/186]

F77_RET_T F77_FUNC ( dtrtri  ,
DTRTRI   
)

◆ F77_FUNC() [90/186]

F77_RET_T F77_FUNC ( dtrtrs  ,
DTRTRS   
)

◆ F77_FUNC() [91/186]

F77_RET_T F77_FUNC ( sgebak  ,
SGEBAK   
)

◆ F77_FUNC() [92/186]

F77_RET_T F77_FUNC ( sgebal  ,
SGEBAL   
)

◆ F77_FUNC() [93/186]

F77_RET_T F77_FUNC ( sgecon  ,
SGECON   
)

◆ F77_FUNC() [94/186]

F77_RET_T F77_FUNC ( sgeesx  ,
SGEESX   
)

◆ F77_FUNC() [95/186]

F77_RET_T F77_FUNC ( sgeevx  ,
SGEEVX   
)

◆ F77_FUNC() [96/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( sgehrd  ,
SGEHRD   
) const &

◆ F77_FUNC() [97/186]

F77_RET_T F77_FUNC ( sgejsv  ,
SGEJSV   
)

◆ F77_FUNC() [98/186]

◆ F77_FUNC() [99/186]

◆ F77_FUNC() [100/186]

◆ F77_FUNC() [101/186]

◆ F77_FUNC() [102/186]

◆ F77_FUNC() [103/186]

F77_RET_T F77_FUNC ( sgesdd  ,
SGESDD   
)

◆ F77_FUNC() [104/186]

F77_RET_T F77_FUNC ( sgesvd  ,
SGESVD   
)

◆ F77_FUNC() [105/186]

◆ F77_FUNC() [106/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( sgetri  ,
SGETRI   
) const &

◆ F77_FUNC() [107/186]

F77_RET_T F77_FUNC ( sgetrs  ,
SGETRS   
)

◆ F77_FUNC() [108/186]

F77_RET_T F77_FUNC ( sggbak  ,
SGGBAK   
)

◆ F77_FUNC() [109/186]

F77_RET_T F77_FUNC ( sggbal  ,
SGGBAL   
)

◆ F77_FUNC() [110/186]

F77_RET_T F77_FUNC ( sggev  ,
SGGEV   
)

◆ F77_FUNC() [111/186]

F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX* F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE& F77_RET_T F77_FUNC ( slartg  ,
SLARTG   
) const &

◆ F77_FUNC() [112/186]

◆ F77_FUNC() [113/186]

◆ F77_FUNC() [114/186]

F77_RET_T F77_FUNC ( sormlq  ,
SORMLQ   
)

◆ F77_FUNC() [115/186]

F77_RET_T F77_FUNC ( sormqr  ,
SORMQR   
)

◆ F77_FUNC() [116/186]

F77_RET_T F77_FUNC ( spocon  ,
SPOCON   
)

◆ F77_FUNC() [117/186]

F77_RET_T F77_FUNC ( spotrf  ,
SPOTRF   
)

◆ F77_FUNC() [118/186]

F77_RET_T F77_FUNC ( spotri  ,
SPOTRI   
)

◆ F77_FUNC() [119/186]

F77_RET_T F77_FUNC ( spotrs  ,
SPOTRS   
)

◆ F77_FUNC() [120/186]

F77_RET_T F77_FUNC ( ssyev  ,
SSYEV   
)

◆ F77_FUNC() [121/186]

F77_RET_T F77_FUNC ( ssygv  ,
SSYGV   
) const &

◆ F77_FUNC() [122/186]

F77_RET_T F77_FUNC ( ssyrk  ,
SSYRK   
)

◆ F77_FUNC() [123/186]

F77_RET_T F77_FUNC ( strcon  ,
STRCON   
)

◆ F77_FUNC() [124/186]

◆ F77_FUNC() [125/186]

F77_RET_T F77_FUNC ( strsyl  ,
STRSYL   
)

◆ F77_FUNC() [126/186]

F77_RET_T F77_FUNC ( strtri  ,
STRTRI   
)

◆ F77_FUNC() [127/186]

F77_RET_T F77_FUNC ( strtrs  ,
STRTRS   
)

◆ F77_FUNC() [128/186]

F77_RET_T F77_FUNC ( xclange  ,
XCLANGE   
)

◆ F77_FUNC() [129/186]

F77_RET_T F77_FUNC ( xdlamch  ,
XDLAMCH   
)

◆ F77_FUNC() [130/186]

F77_RET_T F77_FUNC ( xdlange  ,
XDLANGE   
)

◆ F77_FUNC() [131/186]

F77_RET_T F77_FUNC ( xilaenv  ,
XILAENV   
) const &

◆ F77_FUNC() [132/186]

F77_RET_T F77_FUNC ( xslange  ,
XSLANGE   
)

◆ F77_FUNC() [133/186]

F77_RET_T F77_FUNC ( xzlange  ,
XZLANGE   
)

◆ F77_FUNC() [134/186]

F77_RET_T F77_FUNC ( zgbcon  ,
ZGBCON   
)

◆ F77_FUNC() [135/186]

F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( zgbtrf  ,
ZGBTRF   
) const &

◆ F77_FUNC() [136/186]

F77_RET_T F77_FUNC ( zgbtrs  ,
ZGBTRS   
)

◆ F77_FUNC() [137/186]

F77_RET_T F77_FUNC ( zgebak  ,
ZGEBAK   
)

◆ F77_FUNC() [138/186]

F77_RET_T F77_FUNC ( zgebal  ,
ZGEBAL   
)

◆ F77_FUNC() [139/186]

F77_RET_T F77_FUNC ( zgecon  ,
ZGECON   
)

◆ F77_FUNC() [140/186]

F77_RET_T F77_FUNC ( zgeesx  ,
ZGEESX   
)

◆ F77_FUNC() [141/186]

F77_RET_T F77_FUNC ( zgeevx  ,
ZGEEVX   
)

◆ F77_FUNC() [142/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgehrd  ,
ZGEHRD   
) const &

◆ F77_FUNC() [143/186]

F77_RET_T F77_FUNC ( zgejsv  ,
ZGEJSV   
)

◆ F77_FUNC() [144/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgelqf  ,
ZGELQF   
) const &

◆ F77_FUNC() [145/186]

◆ F77_FUNC() [146/186]

◆ F77_FUNC() [147/186]

◆ F77_FUNC() [148/186]

◆ F77_FUNC() [149/186]

F77_RET_T F77_FUNC ( zgesdd  ,
ZGESDD   
)

◆ F77_FUNC() [150/186]

F77_RET_T F77_FUNC ( zgesvd  ,
ZGESVD   
)

◆ F77_FUNC() [151/186]

◆ F77_FUNC() [152/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgetri  ,
ZGETRI   
) const &

◆ F77_FUNC() [153/186]

F77_RET_T F77_FUNC ( zgetrs  ,
ZGETRS   
)

◆ F77_FUNC() [154/186]

F77_RET_T F77_FUNC ( zggbak  ,
ZGGBAK   
)

◆ F77_FUNC() [155/186]

F77_RET_T F77_FUNC ( zggbal  ,
ZGGBAL   
)

◆ F77_FUNC() [156/186]

F77_RET_T F77_FUNC ( zggev  ,
ZGGEV   
)

◆ F77_FUNC() [157/186]

F77_RET_T F77_FUNC ( zgghrd  ,
ZGGHRD   
)

◆ F77_FUNC() [158/186]

F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgtsv  ,
ZGTSV   
) const &

◆ F77_FUNC() [159/186]

◆ F77_FUNC() [160/186]

F77_RET_T F77_FUNC ( zgttrs  ,
ZGTTRS   
)

◆ F77_FUNC() [161/186]

F77_RET_T F77_FUNC ( zheev  ,
ZHEEV   
)

◆ F77_FUNC() [162/186]

F77_RET_T F77_FUNC ( zhegv  ,
ZHEGV   
) const &

◆ F77_FUNC() [163/186]

F77_RET_T F77_FUNC ( zherk  ,
ZHERK   
)

◆ F77_FUNC() [164/186]

F77_RET_T F77_FUNC ( zhgeqz  ,
ZHGEQZ   
)

◆ F77_FUNC() [165/186]

◆ F77_FUNC() [166/186]

F77_RET_T F77_FUNC ( zormlq  ,
ZORMLQ   
)

◆ F77_FUNC() [167/186]

F77_RET_T F77_FUNC ( zormqr  ,
ZORMQR   
)

◆ F77_FUNC() [168/186]

F77_RET_T F77_FUNC ( zpbcon  ,
ZPBCON   
)

◆ F77_FUNC() [169/186]

F77_RET_T F77_FUNC ( zpbtrf  ,
ZPBTRF   
)

◆ F77_FUNC() [170/186]

F77_RET_T F77_FUNC ( zpbtrs  ,
ZPBTRS   
)

◆ F77_FUNC() [171/186]

F77_RET_T F77_FUNC ( zpocon  ,
ZPOCON   
)

◆ F77_FUNC() [172/186]

F77_RET_T F77_FUNC ( zpotrf  ,
ZPOTRF   
)

◆ F77_FUNC() [173/186]

F77_RET_T F77_FUNC ( zpotri  ,
ZPOTRI   
)

◆ F77_FUNC() [174/186]

F77_RET_T F77_FUNC ( zpotrs  ,
ZPOTRS   
)

◆ F77_FUNC() [175/186]

F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( zptsv  ,
ZPTSV   
) const &

◆ F77_FUNC() [176/186]

◆ F77_FUNC() [177/186]

F77_RET_T F77_FUNC ( zsyrk  ,
ZSYRK   
)

◆ F77_FUNC() [178/186]

F77_RET_T F77_FUNC ( ztgevc  ,
ZTGEVC   
)

◆ F77_FUNC() [179/186]

F77_RET_T F77_FUNC ( ztgsen  ,
ZTGSEN   
) const &

◆ F77_FUNC() [180/186]

F77_RET_T F77_FUNC ( ztrcon  ,
ZTRCON   
)

◆ F77_FUNC() [181/186]

◆ F77_FUNC() [182/186]

F77_RET_T F77_FUNC ( ztrsyl  ,
ZTRSYL   
)

◆ F77_FUNC() [183/186]

F77_RET_T F77_FUNC ( ztrtri  ,
ZTRTRI   
)

◆ F77_FUNC() [184/186]

F77_RET_T F77_FUNC ( ztrtrs  ,
ZTRTRS   
)

◆ F77_FUNC() [185/186]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( zunghr  ,
ZUNGHR   
) const &

◆ F77_FUNC() [186/186]

◆ F77_RET_T() [1/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [2/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [3/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [4/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

Referenced by lapack_version().

◆ F77_RET_T() [5/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [6/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [7/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [8/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

Variable Documentation

◆ A

◆ ALPHA

Definition at line 1399 of file lo-lapack-proto.h.

◆ ALPHAI

Definition at line 1381 of file lo-lapack-proto.h.

◆ ALPHAR

Definition at line 1380 of file lo-lapack-proto.h.

◆ B

◆ BETA

◆ CQ

◆ CWORK

◆ CZ

◆ DIF

◆ F77_CHAR_ARG_LEN_DECL

F77_RET_T const F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT& F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL

Definition at line 45 of file lo-lapack-proto.h.

◆ F77_CONST_CHAR_ARG_DECL

F77_RET_T F77_CONST_CHAR_ARG_DECL

Definition at line 124 of file lo-lapack-proto.h.

◆ IHI

F77_RET_T const F77_INT const F77_INT const F77_INT & IHI

Definition at line 860 of file lo-lapack-proto.h.

◆ ILO

F77_RET_T const F77_INT const F77_INT & ILO

Definition at line 860 of file lo-lapack-proto.h.

◆ INFO

◆ IWORK

◆ LDA

Definition at line 858 of file lo-lapack-proto.h.

◆ LDB

Definition at line 859 of file lo-lapack-proto.h.

◆ LDQ

◆ LDV

F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT & LDV

Definition at line 905 of file lo-lapack-proto.h.

◆ LDVL

Definition at line 1794 of file lo-lapack-proto.h.

◆ LDVR

Definition at line 1795 of file lo-lapack-proto.h.

◆ LDZ

◆ LIWORK

◆ LSCALE

F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE * LSCALE

Definition at line 861 of file lo-lapack-proto.h.

◆ LWORK

◆ M

◆ MM

Definition at line 1796 of file lo-lapack-proto.h.

◆ N

◆ PL

◆ PR

◆ Q

◆ RSCALE

F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE * RSCALE

Definition at line 861 of file lo-lapack-proto.h.

◆ RWORK

◆ SAFMIN

F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE& SAFMIN

Definition at line 1425 of file lo-lapack-proto.h.

◆ SCALE1

F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE& SCALE1

Definition at line 1425 of file lo-lapack-proto.h.

◆ SCALE2

F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE& SCALE2

Definition at line 1426 of file lo-lapack-proto.h.

◆ SELECT

F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL * SELECT

Definition at line 1790 of file lo-lapack-proto.h.

◆ V

◆ VL

Definition at line 1793 of file lo-lapack-proto.h.

Referenced by Fqz().

◆ VR

Definition at line 1794 of file lo-lapack-proto.h.

Referenced by Fqz().

◆ WANTQ

F77_RET_T const F77_LOGICAL & WANTQ

Definition at line 1820 of file lo-lapack-proto.h.

◆ WANTZ

F77_RET_T const F77_LOGICAL const F77_LOGICAL & WANTZ

Definition at line 1821 of file lo-lapack-proto.h.

◆ WI

Definition at line 1427 of file lo-lapack-proto.h.

◆ WORK

◆ WR1

Definition at line 1426 of file lo-lapack-proto.h.

◆ WR2

Definition at line 1426 of file lo-lapack-proto.h.

◆ xVL

Definition at line 1807 of file lo-lapack-proto.h.

◆ xVR

Definition at line 1808 of file lo-lapack-proto.h.

◆ Z